This is a present-day reading of my SoCKit research from 2013–2014, with a related publication in 2023. The dates matter: the archive records what was built then; this note reflects on the engineering boundary it exposes now.
The platform is part of the experiment
A hybrid ARM/FPGA board offers several ways to place computation. Before that choice becomes useful, however, the system needs a path from an input to an observable result.
In the SoCKit work, that meant configuring the board, bringing up Linux, enabling a USB camera through UVC support, building OpenCV, and running a face-detection application. QSys, Quartus, the Linaro toolchain, kernel configuration, and application code belonged to the same experiment. A failure at any one of those boundaries could look like an application problem from the outside.
This is why a block diagram benefits from a second reading. The boxes describe responsibilities. The connections describe assumptions: a device is enumerated, a buffer has the expected format, a library was built for the right target, and the application can consume its input. Integration turns those assumptions into observable behavior.
An FPGA on the board is not an accelerated workload
The thesis measured the integrated SoCKit application against an Intel Core i7-2670QM setup using a standard Lena image. It reported the SoC implementation as approximately 43% slower in that comparison. The conclusion proposed FPGA acceleration as future work.
Those are different statements from “the FPGA accelerated face detection.” The documented result was a working embedded software path and a baseline. Moving part of the algorithm into programmable logic would introduce another set of questions: which operation dominates, how much data crosses the boundary, what format it uses, and whether transfer and synchronization cost erase the gain.
A useful acceleration claim therefore needs a defined workload, an implemented partition, a reproducible comparison, and an accounting of the work outside the accelerated kernel. The presence of a suitable device is an opportunity to investigate these questions.
Preserve the boundary of a result
An older project can remain informative without being recast as something more recent or more complete. The public archive retains the implementation and its limitations. The 2023 paper belongs to its later publication history.
For me, the enduring technical interest is the complete system: establish the data path, make it inspectable, measure a baseline, and choose the next experiment from what the system actually does. That sequence applies well beyond computer vision.
Evidence & further reading
Sources
- SoCKit computer-vision research archive
Thesis artifacts and public commit history from 2014, with a proposal dated September 2013.
- SoCKit thesis · abstract
Describes board integration, Linux/UVC support, OpenCV face detection, and the comparison with an Intel i7-2670QM system.
- SoCKit thesis · conclusions and recommendations
Reports the implementation’s performance gap and proposes FPGA acceleration as subsequent work.
- Integration of OpenCV and Cyclone V Hybrid ARM and FPGA SoC for Face Detection Application
Published bibliographic record. Full-text availability depends on the publisher; authors and date were checked against Crossref.
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